I had a telephone interview and the questions where pretty basic ... what is a State Machine? What is a Latch? How do you construct a TFF our of a DFF? ... I passed the telephone interview and I was asked to come onsite. Everything that I studied pretty much came up in the onsite interview ... however, question began to get harder beyond the scope of what I had either put on my resume, or in the actual application. What I noticed in the paperwork was that although the position that I was applying for was for a Recent College Graduate (RCG), the paperwork showed "experience" ... I had experience as a Apps Engineer, but not as a Component Design Engineer. Given that I was applying for something entirely different (Verilog, Timing related, Synthesis related) and just had graduated from a Masters program, I still was being considered an experience candidate. Make sure that you tell them that if you apply as a RCG, that it should be that way and not as an experienced candidate.

Questions on physical design concepts , syn and apr Sta questions about constraints Concepts of transistor physics Phone screen, multiple round, followed by conversation with the hiring manager Overall good experience