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      Qualcomm

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      ASIC Design Engineer Interview

      Jun 17, 2021
      Anonymous employee
      Markham, ON
      Accepted offer
      Positive experience
      Average interview

      Application

      I applied through a recruiter. The process took 2 months. I interviewed at Qualcomm (Markham, ON) in Apr 2021

      Interview

      All interviews are held on Teams during covid-19. First round is 30-min with the hiring manager, manager briefly introduced what the team does and talked about things on my resume. Second round is 2-hr technical with 2 people from the team (was originally told in the email to be 4-hr with 4 people). Went through things I did in current company and some technical questions. Be prepared to explain projects you did in details (inputs, outputs, logic size, lines of code, etc.) Last round is 30-min with HR. Typical behavior questions.

      Interview questions [4]

      Question 1

      Write some codes to explain how to design asynchronous FIFO.
      1 Answer

      Question 2

      Describe a time when you need to gather information from different sources to troubleshoot an issue.
      Answer question

      Question 3

      Describe a project where you have to regularly communicate with team members.
      Answer question

      Question 4

      Describe a time when you have to overcome a setback on a project.
      Answer question
      4

      Other ASIC Design Engineer interview reviews for Qualcomm

      ASIC Design Engineer Interview

      May 13, 2026
      Anonymous interview candidate
      Mississauga, ON
      No offer
      Positive experience
      Average interview

      Application

      I interviewed at Qualcomm (Mississauga, ON)

      Interview

      I had 6 rounds total. The first two were with senior directors who really drilled into my past projects and took time to walk me through the team's work and org structure — they seemed genuinely engaged. Then I had three rounds with staff engineers. We covered some coding questions I wrote edge detection logic and an FSM, but I made a couple of mistakes on the first pass that I caught and corrected when the interviewers pointed them out. We also talked about DV concepts like reference models and how to build self-checking testbenches. The final round was with a senior MTS from the Markham office, and it was pure behavioral no technical questions, just asking about my background and team fit.

      ASIC Design Engineer Interview

      Feb 10, 2026
      Anonymous employee
      Toronto, ON
      Accepted offer
      Positive experience
      Average interview

      Application

      I interviewed at Qualcomm (Toronto, ON)

      Interview

      2 stage interview with first interview to get to know the position and team. 2nd interview was ~1hr long with all technical questions. Write a counter, make a nand gate with muxes, name some cdc/lint violations.

      Interview questions [1]

      Question 1

      Write verilog for a counter, make a nand gate with muxes
      Answer question

      ASIC Design Engineer Interview

      May 10, 2022
      Anonymous employee
      Accepted offer
      Positive experience
      Difficult interview

      Application

      I interviewed at Qualcomm

      Interview

      Had a phone interview first. Then was called for on site interview. Had 6 interviews. One of them was on software, One was on basic circuits (undergrad level), other were SRAM design.

      Interview questions [1]

      Question 1

      Explain Setup and hold for a latch.
      Answer question
      5

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