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      Cirrus Logic

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      Cirrus Logic interviewsCirrus Logic Graduate Digital Design Engineer interviewsCirrus Logic interview


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      Graduate Digital Design Engineer Interview

      Sep 18, 2020
      Anonymous interview candidate
      Edinburgh, Scotland

      Other Graduate Digital Design Engineer interview reviews for Cirrus Logic

      Graduate Design Engineer (Digital) Interview

      Mar 21, 2016
      Anonymous employee
      Edinburgh, Scotland
      Accepted offer
      No offer
      Positive experience
      Average interview

      Application

      I applied online. The process took 3 months. I interviewed at Cirrus Logic (Edinburgh, Scotland) in May 2020

      Interview

      A phone interview followed by a zoom interview. Everyone I talked to was super nice and helpful during the interviews. The zoom interview was supposed to be an on-site one but changed because of the virus situation. I have also given a presentation to a group of engineers and HR representative about a topic of my choice. The interview process was very pleasant.

      Interview questions [1]

      Question 1

      For the interview, it is very useful to know logic operations and how logic gates' I/O can be represented by logic operations. It is also very useful to know how certain expressions in verilog are translated into digital circuitry.
      Answer question
      1
      Positive experience
      Difficult interview

      Application

      I applied online. The process took 2 months. I interviewed at Cirrus Logic (Edinburgh, Scotland) in Mar 2016

      Interview

      Started of with online application, followed by a telephone interview. Was invited to the assessment day, which began with a general presentation of the company. This was quickly followed by a technical interview, a group exercise, and an a 10-minute presentation (these could happen in any order). Snacks are served all day in-between breaks. Told to expect response in two weeks. Received a call with an offer 8 days later.

      Interview questions [2]

      Question 1

      What problem could a rise when crossing from one clock domain to another (different clock speeds), and how could it be fixed?
      1 Answer

      Question 2

      Difference between blocking and non-blocking assignments and when are they used
      1 Answer
      1