stressed on basics of digital design fundamentals, Verilog, system Verilog, verification concepts, vmm, UVM and OVM. Asked if eRM experience is already there or not. bus protocol knowledge and other companies knowledge as well. Any serial protocol questions are going to be a huge plus in the interview. Testbench skills are a huge plus but not at all mandatory. The process will take one complete day.

I applied through the referral. There were total 6 rounds, in which 4 were technical physical rounds. Next day, I had one HR round and one telephonic interview of technical part one week later. The whole process took almost two weeks to complete. The questions covered were mostly of ASIC designing and VLSI Digital Basics. Having strong academic command on basics would be enough to crack the interviews.