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      SRAM Design Engineer Interview

      Sep 26, 2025
      Anonymous interview candidate
      San Jose, CA
      No offer
      Neutral experience
      Difficult interview

      Application

      I interviewed at TSMC (San Jose, CA)

      Interview

      3 round with 45min each. Questions about resume, logic design, circuit design, finite state machine, 6T and 8T SRAM core, and transistors. Questions are in depth and need some thinking.

      Interview questions [1]

      Question 1

      Explain how to do read assist in at least 5 ways.
      Answer question

      Other SRAM Design Engineer interview reviews for TSMC

      SRAM Design Engineer Interview

      May 1, 2025
      Anonymous interview candidate
      San Jose, CA
      No offer
      Positive experience
      Average interview

      Application

      I applied through a recruiter. The process took 2 weeks. I interviewed at TSMC (San Jose, CA) in Feb 2025

      Interview

      30 minutes long, brief self-introduction, basic digital & analog circuit knowledge, incluing capaciter parameter, set up & hold time analysis, transistor knowledge,current analysis, high school physicial knowledge, small signal analysis

      Interview questions [1]

      Question 1

      what the definition of short channel effect
      Answer question

      SRAM Design Engineer Interview

      Jun 15, 2020
      Anonymous interview candidate
      No offer
      Positive experience
      Average interview

      Application

      I applied online. The process took 2 months. I interviewed at TSMC in Mar 2020

      Interview

      Applied on Linkedin, Got a phone interview with hiring manager, mainly on experiences with circuit design and semiconductor physics. Got an virtual on site interview with the team. The process is okay, HR is responsible for her duties. Didn't get the job tho.

      Interview questions [1]

      Question 1

      Do you have experience with SPICE, Cadence... etc.
      Answer question

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